CS42428 查看數據表（PDF） - Cirrus Logic
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CS42428 Datasheet PDF : 73 Pages
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CS42428
DAC_LRCK
ADC_LRCK
DAC_SCLK
ADC_SCLK
DAC_SDIN1
64 clks
Left Channel
MSB
LSB MSB
LSB MSB
LSB
DAC1
DAC3
DAC5
20 clks
20 clks
20 clks
DAC_SDIN4
DAC7
20 clks
ADC_SDOUT
A DC 1
20 clks
A DC 3
20 clks
A DC 5
20 clks
64 clks
Right Channel
MSB
LSB MSB
LSB MSB
LSB
DAC2
DAC4
DAC6
20 clks
20 clks
20 clks
DAC8
20 clks
A DC2
20 clks
A DC4
20 clks
A DC6
20 clks
MSB
One Line Data Mode #1, Data Valid on Rising Edge of SCLK
Bits/Sample
SCLK Rate(s)
Master
Slave
20
128 Fs
128 Fs
128 Fs
128Fs
Notes
single-speed mode
double-speed mode
Figure 14. One Line Mode #1 Serial Audio Format
DAC_LRCK
ADC_LRCK
DAC_SCLK
ADC_SCLK
DAC_SDIN1
128 clks
Left Channel
MSB
LSB MSB
LSB MSB
LSB
DAC1
DAC3
DAC5
24 clks
24 clks
24 clks
DAC_SDIN4
DAC7
24 clks
ADC_SDOUT
A DC1
24 clks
A DC 3
24 clks
A DC5
24 clks
128 clks
Right Channel
MSB
LSB MSB
LSB MSB
LSB
DAC2
DAC4
DAC6
24 clks
24 clks
24 clks
DAC8
24 clks
A DC2
24 clks
A DC4
24 clks
A DC6
24 clks
One Line Data Mode #2, Data Valid on Rising Edge of SCLK
Bits/Sample
SCLK Rate(s)
Master
Slave
24
256 Fs
not supported
Notes
single-speed mode
MSB
Figure 15. One Line Mode #2 Serial Audio Format
DS605F1
29
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