CS42428(2004) 查看數據表（PDF） - Cirrus Logic

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CS42428
(Rev.:2004)

114 dB, 192 kHz 8-Ch Codec with PLL

Cirrus Logic 

CS42428

3.5.2 Serial Audio Interface Formats

The DAC_SP and ADC_SP digital audio serial ports support 5 formats with varying bit depths from 16 to

24 as shown in Figure 7, Figure 8, Figure 9, Figure 10 and Figure 11. These formats are selected using the

configuration bits in the registers, “Functional Mode (address 03h)” on page 33 and “Interface Formats

(address 04h)” on page 34. For the diagrams below, single-speed mode is equivalent to Fs = 32, 44.1,

48kHz; double-speed mode is for Fs = 64, 88.2, 96 kHz; and quad-speed mode is for Fs = 176.4, 196 kHz.

DAC_LRCK

ADC_LRCK

DAC_SCLK

ADC_SCLK

D A C_ S DIN x

ADC_SDOUT

Left Channel

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Right Chan nel

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Right Justified Mode, Data Valid on Rising Edge of SCLK

Bits/Sample

SCLK Rate(s)

Notes

Master

Slave

16

64 Fs

48, 64, 128 Fs

single-speed mode

64 Fs

64 Fs

double-speed mode

64 Fs

64 Fs

quad-speed mode

24

64, 128, 256 Fs

64, 128 Fs

single-speed mode

64 Fs

64 Fs

double-speed mode

64 Fs

64 Fs

quad-speed mode

Figure 7. Right Justified Serial Audio Formats

18

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