C8051F521-C-IM 查看數據表（PDF） - Silicon Laboratories

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C8051F521-C-IM

8/4/2 kB ISP Flash MCU Family

Silicon Laboratories 

C8051F52x/F53x

SFR Definition 16.4. SPI0DAT: SPI0 Data

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address: 0xA3

Bits7–0: SPI0DAT: SPI0 Transmit and Receive Data.

The SPI0DAT register is used to transmit and receive SPI0 data. Writing data to SPI0DAT

places the data into the transmit buffer and initiates a transfer when in Master Mode. A read

of SPI0DAT returns the contents of the receive buffer.

160

Rev. 1.4

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