C8051F524-C-IM 查看數據表（PDF） - Silicon Laboratories

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C8051F524-C-IM

8/4/2 kB ISP Flash MCU Family

Silicon Laboratories 

C8051F52x/F53x

SF Signals DFN10

PIN I/O

TX0

RX0

TX0

RX0

SCK

MISO

MOSI

NSS*

LIN-TX

LIN_RX

CP0

CP0A

/SYSCLK

CEX0

CEX1

CEX2

ECI

T0

T1

012345

C8051F52xA/F52x-C

devices

C8051F52x devices

000000

P0SKIP[0:5]

Port pin potentially assignable to peripheral

SF Signals

Special Function Signals are not assigned by the crossbar.

When these signals are enabled, the Crossbar must be manually configured

to skip their corresponding port pins.

Note: 4-Wire SPI Only.

Figure 13.5. Crossbar Priority Decoder with No Pins Skipped (DFN 10)

124

Rev. 1.4

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