CS42438-DMZR 查看數據表（PDF） - Cirrus Logic

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CS42438-DMZR

108 dB, 192 kHz 6-in, 8-out TDM CODEC

Cirrus Logic 

5.0 V

VA

AOUTx+

AOUTx-

4.125 V

2.5 V

0.875 V

4.125 V

2.5 V

0.875 V

Full-Scale Differential Output Level =

(AOUTx+) - (AOUTx-) = 6.5 VPP = 2.3 VRMS

Figure 12. Full-Scale Output

5.3.3 Digital Volume Control

Hardware Mode

DAC Volume Control and Mute are not accessible in Hardware Mode.

Software Mode

Each DAC’s output level is controlled via the Volume Control registers operating over the range

of 0 to -127.5 dB attenuation with 0.5 dB resolution. See “AOUTX Volume Control (addresses

08h- 0Fh)” on page 48. Volume control changes are programmable to ramp in increments of

0.125 dB at the rate controlled by the SZC[1:0] bits in the Digital Volume Control register. See

“Transition Control (address 06h)” on page 46.

Each output can be independently muted via mute control bits in the register “DAC Channel

Mute (address 07h)” on page 48. When enabled, each AOUTx_MUTE bit attenuates the corre-

sponding DAC to its maximum value (-127.5 dB). When the AOUTx_MUTE bit is disabled, the

corresponding DAC returns to the attenuation level set in the Volume Control register. The at-

tenuation is ramped up and down at the rate specified by the SZC[1:0] bits.

5.3.4 De-Emphasis Filter

The CS42438 includes on-chip digital de-emphasis optimized for a sample rate of 44.1 kHz. The

filter response is shown in Figure 13. The de-emphasis feature is included to accommodate au-

dio recordings that utilize 50/15 µs pre-emphasis equalization as a means of noise reduction.

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DS646PP2

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