CS61575-IP1 查看數據表（PDF） - Cirrus Logic
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CS61575-IP1 Datasheet PDF : 44 Pages
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LINE INTERFACE EVALUATION BOARD
RV+
RV+
+5V
GND
(0V)
D10
P6KE
C2
0.1µF
C3
1 µF
C1
68µF
+
Prototyping
Area
RV+
RNEG
(BPV)
RCLK
TCLK
Pin 6
RCLK
TCLK
15 14
22
21
R13 (only included for CS6158/58A)
TV+ TGND RGND RV+
1kΩ
6 RNEG (BPV)
8 RCLK
2 TCLK
XTALIN
{CS6158/58A: RT}
XTALOUT
{CS6158/58A: NC}
9
E1: CXT8192
T1: CXT6176
10
(not included for CS6158/58A)
RTIP
Change R9 and R10 for E1 operation
TPOS
(TDATA)
RPOS
(RDATA)
Pin 3
3 TPOS (TDATA)
Pin 7
7 RPOS (RDATA)
ACLKI
R1 51.1Ω D JP4 D
RV+
R15
100Ω
ACLKI
TNEG
C
B JP2 B
C
Pin 4
1 ACLKI
4 TNEG (TCODE)
A
A
S2
RCODE
TCODE
LEN0/INT
LEN1/SDI
LEN2/SD0
RLOOP/CS
LLOOP/SCLK
TAOS/CLKE
INT
SDI
23 LEN0 [INT]
24 LEN1 [SDI]
25 LEN2 [SD0]
26 RLOOP [CS]
27
28 LLOOP [SCLK]
TAOS [CKLE]
RTIP 19
R10
200Ω
T2
(see Table 2)
2:1
RTIP
U1
R9
RRING
200Ω
RRING 20
13 TTIP
TTIP
Pin 18
MRING (PCS) 18
JP6
B
B
TRING A
A
TRING
16
Pin 17
MTIP (RCODE) 17
B JP7 B
AA
RRING
0.47 µF
C5
JP5
EE
TTIP
JP8
FF
T1
(see Table 2) TRING
R2
4.4Ω
SDO
CS
SCLK
JP1 D9
1N914
S1
RESET
R4
221kΩ
D8
C4 0.047µF
6
3
MODE DPM (AIS)
LOS
5
R14
4.7kΩ
SIP
11
DPM RV+
(AIS)
12
RV+
LOS
Q2
2N2222
Q1
2N2222
MODE
MODE
SW1
LED
D2
R5
470Ω
LED
D3
R6
470Ω
(Used only for E1 75Ω
applications with the CS61534,
CS61535, CS6158, CS61574,
OR CS61577)
U1: CS61534, CS61535,
CS61535A, CS6158,
CS6158A, CS61574,
CS61574A, CS61575,
CS61577, CS61304A,
OR CS61305A
8
7
51 2
4
RV+
R16 R18 R17
1kΩ 10k Ω 10k Ω
HOST:3-1,6-8
EXT HW: 3-2, 6-7
HW: 3-4, 6-5
Figure 1. Evaluation Board Schematic
DS40DB3
35
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