PSD4202G3V-12UI 查看數據表（PDF） - STMicroelectronics

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PSD4202G3V-12UI

Flash In-System Programmable (ISP) Peripherals For 16-bit MCUs (5V Supply)

STMicroelectronics 

PSD4235G2

Table 73. Power-down Timing

Symbol

Parameter

tLVDV

ALE Access Time from Power-down

tCLWH

Maximum Delay from

APD Enable to Internal PDN Valid

Signal

Note: 1. tCLCL is the period of CLKIN (PD1).

Conditions

Using CLKIN

(PD1)

-70

Min Max

80

-90

Unit

Min Max

90

ns

15 * tCLCL1

µs

84/89

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