PSD4242F3V-15UI 查看數據表（PDF） - STMicroelectronics
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PSD4242F3V-15UI
STMicroelectronics
PSD4242F3V-15UI Datasheet PDF : 89 Pages
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PSD4235G2
Table 64. Input Macrocell Timing
Symbol
Parameter
Conditions
-70
Min Max
-90
Min Max
PT
Aloc
Turbo
Off
Unit
tIS
Input Setup Time
(Note 1)
0
0
ns
tIH
Input Hold Time
(Note 1)
15
20
+ 12 ns
tINH
NIB Input High Time
(Note 1)
9
12
ns
tINL
NIB Input Low Time
(Note 1)
9
12
ns
tINO
NIB Input to Combinatorial
Delay
(Note 1)
34
46
+ 2 + 12 ns
Note: 1. Inputs from Port A, B, and C relative to register/latch clock from the PLD. ALE latch timings refer to tAVLX and tLXAX .
Figure 43. Input Macrocell Timing (product term clock)
tINH
tINL
PT CLOCK
tIS
tIH
INPUT
OUTPUT
AI03101
tINO
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