PSD4214F2-15UI 查看數據表（PDF） - STMicroelectronics
零件编号
产品描述 (功能)
生产厂家
PSD4214F2-15UI
STMicroelectronics
PSD4214F2-15UI Datasheet PDF : 89 Pages
| |||
PSD4235G2
REGISTER BIT DEFINITION
All the registers of the PSD are included here, for
reference. Detailed descriptions of these registers
can be found in the following sections.
Table 7. Data-In Registers – Ports A, B, C, D, E, F, G
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 7 Port pin 6 Port pin 5 Port pin 4
Note: Bit Definitions (Read-only registers):
Read Port pin status when Port is in MCU I/O input mode.
Port pin 3
Bit 2
Port pin 2
Table 8. Data-Out Registers – Ports A, B, C, D, E, F, G
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Port pin 7 Port pin 6 Port pin 5 Port pin 4 Port pin 3 Port pin 2
Note: Bit Definitions:
Latched data for output to Port pin when pin is configured in MCU I/O output mode.
Table 9. Direction Registers – Ports A, B, C, D, E, F, G
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 7 Port pin 6 Port pin 5 Port pin 4 Port pin 3
Note: Bit Definitions:
Port pin <i> 0 = Port pin <i> is configured in Input mode (default).
Port pin <i> 1 = Port pin <i> is configured in Output mode.
Bit 2
Port pin 2
Table 10. Control Registers – Ports E, F, G
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 7 Port pin 6 Port pin 5 Port pin 4 Port pin 3
Note: Bit Definitions:
Port pin <i> 0 = Port pin <i> is configured in MCU I/O mode (default).
Port pin <i> 1 = Port pin <i> is configured in Latched Address Out mode.
Bit 2
Port pin 2
Table 11. Drive Registers – Ports A, B, D, E, G
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 7 Port pin 6 Port pin 5 Port pin 4 Port pin 3
Note: Bit Definitions:
Port pin <i> 0 = Port pin <i> is configured for CMOS Output driver (default).
Port pin <i> 1 = Port pin <i> is configured for Open Drain output driver.
Bit 2
Port pin 2
Table 12. Drive Registers – Ports C, F
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Port pin 7 Port pin 6 Port pin 5 Port pin 4 Port pin 3
Note: Bit Definitions:
Port pin <i> 0 = Port pin <i> is configured for CMOS Output driver (default).
Port pin <i> 1 = Port pin <i> is configured in Slew Rate mode.
Bit 2
Port pin 2
Bit 1
Port pin 1
Bit 1
Port pin 1
Bit 1
Port pin 1
Bit 1
Port pin 1
Bit 1
Port pin 1
Bit 1
Port pin 1
Bit 0
Port pin 0
Bit 0
Port pin 0
Bit 0
Port pin 0
Bit 0
Port pin 0
Bit 0
Port pin 0
Bit 0
Port pin 0
15/89
Share Link: 