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STM32F103VB 查看數據表(PDF) - STMicroelectronics

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STM32F103VB Datasheet PDF : 67 Pages
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STM32F103xx
Electrical characteristics
Output voltage levels
Unless otherwise specified, the parameters given in Table 30 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 7.
Table 30. Output voltage characteristics
Symbol
Parameter
Conditions
Min
Max Unit
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
TTL port
0.4
IIO = +8 mA
V
VOH(2)
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
2.7 V < VDD < 3.6 V VDD–0.4
VOL (1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
CMOS port
IIO =+ 8mA
VOH (2)
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
2.7 V < VDD < 3.6 V
2.4
0.4
V
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
IIO = +20 mA
1.3
V
VOH(2)
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
2.7 V < VDD < 3.6 V VDD–1.3
VOL (1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
IIO = +6 mA
0.4
V
VOH (2)
Output high level voltage for an I/O pin
when 4 pins are sourced at same time
2 V < VDD < 2.7 V VDD–0.4
1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 5
and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
2. The IIO current sourced by the device must always respect the absolute maximum rating specified in
Table 5 and the sum of IIO (I/O ports and control pins) must not exceed IVDD.
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