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STM32F103C8 查看數據表(PDF) - STMicroelectronics

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STM32F103C8 Datasheet PDF : 67 Pages
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STM32F103xx
Electrical characteristics
5.3.12
I/O port pin characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 29 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 7.
All unused pins must be held at a fixed voltage, by using the I/O output mode, an external
pull-up or pull-down resistor (see Figure 15).
Table 29. I/O static characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max Unit
VIL Input low level voltage(2)
IO TC input high level
VIH voltage(2)
IO FT high level voltage(2)
VIL Input low level voltage(2)
VIH Input high level voltage(2)
IO TC Schmitt trigger voltage
hysteresis(3)
Vhys
IO TC Schmitt trigger voltage
hysteresis(3)
–0.5
TTL ports
2
0.8
V
VDD+0.5
CMOS ports
2
–0.5
0.65 VDD
5.5V
0.35 VDD
V
VDD+0.5
200
mV
5% VDD(4)
mV
Ilkg Input leakage current (5)
VSS VIN VDD
Standard I/Os
VIN= 5 V
5 V tolerant I/Os
±1
µA
3
RPU
Weak pull-up equivalent
resistor(6)
VIN = VSS
30
40
50
k
RPD
Weak pull-down equivalent
resistor(6)
VIN = VDD
30
40
50
k
CIO I/O pin capacitance
5
pF
1. VDD = 3.3 V, TA = 40 to 105 °C unless otherwise specified.
2. Values based on characterization results, and not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. With a minimum of 100 mV.
5. Leakage could be higher than max. if negative current is injected on adjacent pins.
6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order).
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