M38501MD-SP 查看數據表（PDF） - Renesas Electronics

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M38501MD-SP

8-BIT CISC SINGLE-CHIP MICROCOMPUTER

Renesas Electronics 

HARDWARE

FUNCTIONAL DESCRIPTION

Data bus

f(XIN)/16

(f(XCIN)/16 at low-speed mode)

f(XIN)/2

(f(XCIN)/2 at low-speed mode)

Pulse width

Timer X count source selection bit

measurement

mode

Prescaler X latch (8)

Timer mode

Pulse output mode

Prescaler X (8)

P27/CNTR0

CNTR0 active edge

selection bit

“0”

Event

counter

mode

Timer X count stop bit

“1”

Port P27

direction register

Port P27

latch

Pulse output mode

CNTR0 active

edge selection “1”

bit

“0”

Q

Toggle flip-flop T

Q

R

Data bus

f(XIN)/16

(f(XCIN)/16 at low-speed mode)

f(XIN)/2

(f(XCIN)/2 at low-speed mode)

Timer Y count source selection bit

Prescaler Y latch (8)

Pulse width

measure- Timer mode

ment mode Pulse output mode

P40/CNTR1

CNTR1 active edge

selection bit

“0”

Event

counter

mode

Prescaler Y (8)

Timer Y count stop bit

“1”

Port P40

direction register

Port

P40latch

Pulse output mode

CNTR1 active

edge selection “1”

bit

“0”

Q

Toggle flip-flop T

Q

R

Data bus

Timer X latch (8)

Timer X (8)

To timer X interrupt

request bit

To CNTR0 interrupt

request bit

Timer X latch write pulse

Pulse output mode

Timer Y latch (8)

Timer Y (8)

To timer Y interrupt

request bit

To CNTR1 interrupt

request bit

Timer Y latch write pulse

Pulse output mode

Prescaler 12 latch (8)

f(XIN)/16

(f(XCIN)/16 at low-speed mode)

f(XCIN)

Timer 12 count source selection bit

Prescaler 12 (8)

Timer 1 latch (8)

Timer 1 (8)

Timer 2 latch (8)

Timer 2 (8)

To timer 2 interrupt

request bit

To timer 1 interrupt

request bit

Fig. 17 Block diagram of timer X, timer Y, timer 1, and timer 2

1-22

3850 Group (Spec. H) User’s Manual

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