M38501M4-SP 查看數據表（PDF） - Renesas Electronics
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M38501M4-SP Datasheet PDF : 287 Pages
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APPENDIX
3.5 List of registers
A-D control register
b7 b6 b5 b4 b3 b2 b1 b0
A-D control register
(ADCON: address 3416)
b
Name
0 Analog input pin
selection bits
1
2
Functions
b2 b1 b0
0 0 0: P30/AN0
0 0 1: P31/AN1
0 1 0: P32/AN2
0 1 1: P33/AN3
1 0 0: P34/AN4
At reset R W
0
0
0
3 Nothing is arranged for this bit. This is a write
0
disabled bit. When this bit is read out, the
contents are “0”.
4 AD conversion
0: Conversion in progress
1
completion bit
1: Conversion completed
5 Nothing is arranged for these bits. These are
0
6 write disabled bits. When these bist are read
0
7 out, the contents are “0”.
0
Fig. 3.5.20 Structure of A-D control register
A-D conversion register (low-order)
b7 b6 b5 b4 b3 b2 b1 b0
A-D conversion register (low-order)
(ADL: address 3516)
b
Functions
At reset R W
0 This is A-D conversion result stored bits. This is Undefined
1 read exclusive register.
Unde0fined
2
3
4
b7 8-bit read b0
b9 b8 b7 b6 b5 b4 b3 b2
Unde0fined
Unde0fined
Unde0fined
5
b7 10-bit read b0
Unde0fined
6
b7 b6 b5 b4 b3 b2 b1 b0
Unde0fined
7
Unde0fined
Fig. 3.5.21 Structure of A-D conversion low-order register
3-60
3850 Group (Spec. H) User’s Manual
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