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VB125ASP 查看數據表(PDF) - STMicroelectronics

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VB125ASP Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
VB125ASP
NOTE 1: Only functionality is guaranteed with 6V<VCC<10V and VCC>24V and not parameter values.
NOTE 2: In the high voltage clamping structure of this device a temperature compensation has been implemented. The
circuit schematic is shown in fig. 1. The KVbe cell takes care of the temperature compensation. The whole electrical
characteristic of the new circuit is shown in fig. 2. Up to VCE=nVZ no current will flow into the collector (just the leakage
current of the power stage); for nVZ < VCE < Vcl a current begins to flow across the resistances of the KVbe compensation
circuit (typical slope 20 K) as soon as the Vcl reached the dinamic resistance drop to ~4to protect the device against
overvoltage (See figure 3).
NOTE 3: The saturation voltage of the Power stage includes the drop on the sensing resistor.
NOTE 4: Considering the different ways of operation of the device (with or without spark, etc...) there are some short
periods of time in which the output terminal (HVC) is pulled below ground by a negative current due to leakage
inductances and stray capacitances of the ignition coil. With VIPower devices, if no corrective action is taken, these
negative currents can cause parasitic glitches on the diagnostic output. To kill this potential problem, a circuit that avoids
the possibility for the HVC to be pulled underground, by sending the required negative current from the battery is
implemented in the VB125ASP. For this reason there are some short periods in which a current exceeding 220 mA flows
in the VCC pin.
NOTE 5: A zener protection of 16V (typical) is placed on the supply pin (VCC) of the chip to protect the internal circuitry.
For this reason, when the battery voltage exceeds that value, the current flowing into VCC pin can be greater than the
maximum current specified at VCC=14V (both in power on and power off conditions): it will be limited by an internal
resistor.
NOTE 6: The primary coil current value Icl must be measured 1 ms after desaturation of the power stage.
NOTE 7: These limits apply with regard to the minimum battery voltage and resistive drop on the coil and cables that
permit to reach the limitation or diagnostic level.
NOTE 8: No internal Pull-Down.
NOTE 9: When IC gets over IC(diag), the diagnostic output voltage rises to the high level and so it remains until the end of
the input signal.
NOTE 10: Tjmin=150°C means that the behavior of the device will not be affected for junction temperature lower than
150°C. For higher temperature, the thermal protection circuit will begin its action reducing the Icl limit according with the
power dissipation. Chip temperature is a function of the Rth of the whole system in which the device will be
operating (See Fig.4).
NOTE 11: Turn on delay time measured from 90% of input voltage rising edge to 10% of output voltage falling edge.
NOTE 12: Turn off delay time is defined as the time between the 90% of input pulse falling edge and the point where the
HVC reaches 200V.
FIGURE 1: Temperature compensated high voltage
clamp
nVZ
Ri1
KVbe
Rii
HVC
Rsense
PWR GND
4/9
1
FIGURE 2: Electrical characteristic of the circuit shown in
Figure 1.
IC [mA]
40
30
20
10
slope ∝ ∑Ri
100
200
300 400
nVZ
VCL
VCE [V]

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