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CS42L52 查看數據表(PDF) - Cirrus Logic

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CS42L52 Datasheet PDF : 82 Pages
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5/13/08
CS42L52
input path. The PGAxSEL bits may be used to isolate the input signal(s) from the PGA outputs. When
the PGA is powered down, no input should be selected. Refer to “ADC Input Select” on page 48 and
“PGA Input Mapping” on page 49 for the required settings.
6.2.3
Power Down ADCx
Configures the power state of ADC channel x.
PDN_ADCx
0
1
Application
ADC Status
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“Analog In to Analog Out Passthrough” on page 32
Notes:
1. The CS42L52 employs a clever scheme for controlling the power to the ADC when PASSTHRU
(“Passthrough Analog” on page 52) and PDN_OVRD (“Power Down ADC Override” on page 43) are
enabled. Refer to the referenced application.
6.2.4
Power Down
Configures the power state of the entire CODEC.
PDN
0
1
CODEC Status
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6.3 Power Control 2 (Address 03h)
7
Reserved
6
Reserved
5
Reserved
4
OVRDB
3
OVRDA
2
PDN_MICB
1
PDN_MICA
0
PDN_BIAS
6.3.1
Power Down ADC Override
Configures an override of the power down control for ADCx.
OVRDx
0
1
Application
PDN_ADC Override
Disable
Enable
“Analog In to Analog Out Passthrough” on page 32
6.3.2
Power Down MICx
Configures the power state of the microphone pre-amplifier for channel x.
PDN_MICx
0
1
Application
MIC Pre-Amp Status
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“MIC Inputs” on page 27
6.3.3
Power Down MIC Bias
Configures the power state of the microphone bias circuit.
PDN_BIAS
0
1
MIC Bias Status
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DS680F1
43

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