CS42L52(2006) 查看數據表（PDF） - Cirrus Logic

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CS42L52
(Rev.:2006)

Low Power, Stereo CODEC w/Headphone & Speaker Amps

Cirrus Logic 

CS42L52

6.31 Limiter Attack Rate (Address 29h)

7

Reserved

6

Reserved

5

4

LIMARATE5 LIMARATE4

3

LIMARATE3

2

LIMARATE2

1

LIMARATE1

0

LIMARATE0

6.31.1 Limiter Attack Rate

Sets the rate at which the limiter applies digital attenuation from levels above the MAX[2:0] threshold

(“Limiter Maximum Threshold” on page 65).

LIMARATE[5:0]

00 0000

···

11 1111

Application:

Attack Time

Fastest Attack

···

Slowest Attack

“Limiter” on page 31

Note: The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and

the DIGSFT (“Digital Soft Ramp” on page 53) and DIGZC (“Digital Zero Cross” on page 53) setting unless

the respective disable bit (“Limiter Soft Ramp Disable” on page 65 or “Limiter Zero Cross Disable” on

page 66) is enabled.

6.32 ALC Enable & Attack Rate (Address 2Ah)

7

ALCB

6

ALCA

5

4

3

2

1

0

ALCARATE5 AALCRATE4 ALCARATE3 ALCARATE2 ALCARATE1 ALCARATE0

6.32.1 ALCx Enable

Configures the automatic level controller.

ALC

0

1

Application:

ALC Status

Disabled

Enabled

“Automatic Level Control (ALC)” on page 27

6.32.2 ALC Attack Rate

Sets the rate at which the ALC applies analog and/or digital attenuation from levels above the AMAX[2:0]

threshold (“ALC Maximum Threshold” on page 68).

LIMARATE[5:0]

00 0000

···

11 1111

Application:

Attack Time

Fastest Attack

···

Slowest Attack

“Automatic Level Control (ALC)” on page 27

Note: The ALC attack rate is user-selectable but is also a function of the sampling frequency, Fs, and

the ANLGSFTx (“Ch. x Analog Soft Ramp” on page 49) and ANLGZCx (“Ch. x Analog Zero Cross” on

page 49) setting unless the respective disable bit (“ALCx Soft Ramp Disable” on page 55 or “ALCx Zero

Cross Disable” on page 55) is enabled.

DS680A1

67

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