STM32F100VBH7BTR(2010) 查看數據表（PDF） - STMicroelectronics

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STM32F100VBH7BTR
(Rev.:2010)

Low & medium-density value line, advanced ARM-based 32-bit MCU with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces

STMicroelectronics 

STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB

Electrical characteristics

Output voltage levels

Unless otherwise specified, the parameters given in Table 34 are derived from tests

performed under the ambient temperature and VDD supply voltage conditions summarized

in Table 8. All I/Os are CMOS and TTL compliant.

Table 34. Output voltage characteristics

Symbol

Parameter

Conditions

Min Max Unit

VOL(1)

Output Low level voltage for an I/O pin

when 8 pins are sunk at the same time

TTL port,

0.4

VOH(2)

Output High level voltage for an I/O pin

IIO = +8 mA,

2.7 V < VDD < 3.6 V

when 8 pins are sourced at the same time

VDD–0.4

V

VOL(1)

Output low level voltage for an I/O pin

when 8 pins are sunk at the same time

CMOS port

IIO = +8 mA

VOH(2)

Output high level voltage for an I/O pin

when 8 pins are sourced at the same time

2.7 V < VDD < 3.6 V

2.4

0.4

V

VOL(1)

Output low level voltage for an I/O pin

when 8 pins are sunk at the same time

IIO = +20 mA(3)

1.3

V

VOH (2)

Output high level voltage for an I/O pin

when 8 pins are sourced at the same time

2.7 V < VDD < 3.6 V

VDD–1.3

VOL(1)

Output low level voltage for an I/O pin

when 8 pins are sunk at the same time

IIO = +6 mA(3)

0.4

V

VOH(2)

Output high level voltage for an I/O pin

when 8 pins are sourced at the same time

2 V < VDD < 2.7 V

VDD–0.4

1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 6

and the sum of IIO (I/O ports and control pins) must not exceed IVSS.

2. The IIO current sourced by the device must always respect the absolute maximum rating specified in

Table 6 and the sum of IIO (I/O ports and control pins) must not exceed IVDD.

3. Based on characterization data, not tested in production.

Doc ID 16455 Rev 2

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