CS5507-AS 查看數據表（PDF） - Cirrus Logic

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CS5507-AS

Very Low-power, 16-bit & 20-bit A/D Converters

Cirrus Logic 

CS5505/6/7/8

CS5505/6/7/8

Figure 14 illustrates the System Connection Dia-

gram for the CS5505/6 using a single +5V

supply. Note that all supply pins are bypassed

with 0.1 µF capacitors and that the VD+ digital

supply is derived from the VA+ supply.

Figure 15 illustrates the CS5505/6 using dual

supplies of +5 and -5V.

Figure 16 illustrates the CS5505/6 using dual

supplies of +10V analog and +5V digital.

When using separate supplies for VA+ and

VD+, VA+ must be established first. VD+

should never become more positive than VA+

under any operating condition. Remember to in-

vestigate transient power-up conditions, when

one power supply may have a faster rise time.

10Ω

+5V

Analog

Supply

0.1 µF

17

VA+

Calibration

Control

4 CAL

0.1 µF

20

VD+

5

XIN

6

XOUT

Optional

Clock

Source

32.768 kHz

Bipolar/

Unipolar

Input Select

8

BP/UP

7

M/SLP

CS5505/6

Analog*

Signal

Sources

9

10

AIN1+

12 AIN2+

13

AIN3+

AIN4+

21

SCLK

22

Signal

11

Ground *Unused analog inputs AIN-

SDATA

DRDY 23

should be tied to AIN-

14

Voltage +

Reference

15

-

16

VREF+

VREF-

VREFOUT

CS 2

1

A0

A1

24

CONV 3

DGND 19

-5V

0.1 µF

VA-

Analog

18

Supply

Sleep Mode

Control

and

Output Mode

Select

Serial

Data

Interface

Control

Logic

Unused Logic

inputs must be

connected to

VD+ or DGND.

Note: To use the internal 2.5 volt reference see Figure 6.

Figure 15. CS5505/6 System Connection Diagram Using External Reference, Dual Supplies

24

DS59F54

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