STM8S105K4T3TR(2015) 查看數據表（PDF） - STMicroelectronics

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STM8S105K4T3TR
(Rev.:2015)

Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbyte Flash, integrated EEPROM, 10-bit ADC, timers, UART, SPI, I²C

STMicroelectronics 

STM8S105x4/6

Memory and register map

Table 8. General hardware register map (continued)

Address

Block

Register label

Register name

Reset status

0x00 5400

ADC_CSR

ADC control/status register 0x00

0x00 5401

ADC_CR1

ADC configuration register 1 0x00

0x00 5402

ADC_CR2

ADC configuration register 2 0x00

0x00 5403

ADC_CR3

ADC configuration register 3 0x00

0x00 5404

ADC_DRH

ADC data register high

0xXX

0x00 5405

ADC_DRL

ADC data register low

0xXX

0x00 5406

ADC_TDRH

ADC Schmitt trigger disable

register high

0x00

0x00 5407

ADC_TDRL

ADC Schmitt trigger disable

register low

0x00

0x00 5408

0x00 5409

ADC1

cont’d

ADC_HTRH

ADC_HTRL

ADC high threshold register

high

ADC high threshold register

low

0x03

0xFF

0x00 540A

ADC_LTRH

ADC low threshold register

high

0x00

0x00 540B

ADC_LTRL

ADC low threshold register

low

0x00

0x00 540C

ADC_AWSRH

ADC analog watchdog status

register high

0x00

0x00 540D

ADC_AWSRL

ADC analog watchdog status

register low

0x00

0x00 540E

ADC _AWCRH

ADC analog watchdog control

register high

0x00

0x00 540F

ADC_AWCRL

ADC analog watchdog control

register low

0x00

0x00 5410 to 0x00 57FF Reserved area (1008 byte)

1. Depends on the previous reset source.

2. Write-only register.

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