
STM32F21xxx
Pinouts and pin description
Table 5. STM32F21x pin and ball definitions (continued)
Pins
Pin name
Main
function(3)
(after reset)
Alternate functions
Other
functions
8 15 26 32 M2
9 16 27 33 M3
10 17 28 34 M4
11 18 29 35 M5
- 19 30 36 -
12 20 31 37 M1
- - - - N1
- 21 32 38 P1
13 22 33 39 R1
14 23 34 40 N3
15 24 35 41 N2
16 25 36 42 P2
- - - 43 F4
- - - 44 G4
- - - 45 H4
- - - 46 J4
17 26 37 47 R2
PC0(6)
PC1(6)
PC2(6)
PC3(6)
VDD_12
VSSA
VREF-
VREF+
VDDA
PA0(7)-WKUP(6)
PA1(6)
PA2(6)
PH2
PH3
PH4
PH5
PA3(6)
I/O FT
PC0
OTG_HS_ULPI_STP/
EVENTOUT
ADC123_
IN10
I/O FT
PC1
ETH_MDC/ EVENTOUT
ADC123_
IN11
I/O FT
PC2
SPI2_MISO /
OTG_HS_ULPI_DIR /
ETH_MII_TXD2/
EVENTOUT
ADC123_
IN12
I/O FT
PC3
SPI2_MOSI / I2S2_SD /
OTG_HS_ULPI_NXT /
ETH_MII_TX_CLK/
EVENTOUT
ADC123_
IN13
S
S
S
S
S
I/O FT
VDD_12
VSSA
VREF-
VREF+
VDDA
PA0-WKUP
USART2_CTS/ UART4_TX/
ETH_MII_CRS /
TIM2_CH1_ETR/
TIM5_CH1 / TIM8_ETR/
ADC123_IN0/
WKUP
EVENTOUT
USART2_RTS / UART4_RX/
ETH_RMII_REF_CLK /
I/O FT
PA1
ETH_MII_RX_CLK /
ADC123_IN1
TIM5_CH2 / TIM2_CH2/
EVENTOUT
I/O FT
PA2
USART2_TX/TIM5_CH3 /
TIM9_CH1 / TIM2_CH3 / ADC123_IN2
ETH_MDIO/ EVENTOUT
I/O FT
PH2
ETH_MII_CRS/ EVENTOUT
I/O FT
PH3
ETH_MII_COL/ EVENTOUT
I/O FT
PH4
I2C2_SCL /
OTG_HS_ULPI_NXT/
EVENTOUT
I/O FT
PH5
I2C2_SDA/ EVENTOUT
USART2_RX/TIM5_CH4 /
I/O FT
PA3
TIM9_CH2 / TIM2_CH4 /
OTG_HS_ULPI_D0 /
ADC123_IN3
ETH_MII_COL/ EVENTOUT
Doc ID 17050 Rev 8
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