CS4225-KL 查看數據表（PDF） - Cirrus Logic
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CS4225-KL Datasheet PDF : 30 Pages
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CS4225
Memory Address Pointer (MAP)
Auxiliary Port Mode Byte (7)
B7 B6 B5 B4 B3 B2 B1 B0
INCR 0 0 0 MAP3 MAP2 MAP1 MAP0
MAP3-MAP0 Register Function
0 - Reserved
1 - Output Attenuator 1
2 - Output Attenuator 2
3 - Output Attenuator 3
4 - Output Attenuator 4
5 - Input Gain 1
6 - Input Gain 2
7 - Auxiliary Port Mode
8 - DSP Port Mode
9 - Clock Mode
10 - Control Byte
11 - Status Report Byte
12 - Input Channel Select
13 - Aux Control Byte
14 - Reserved
15 - Reserved
INCR
Auto Increment Control Bit
0 - No auto increment
1 - Auto increment on
Output Attenuator Data Byte (1, 2, 3, 4)
B7 B6 B5 B4 B3 B2 B1 B0
0 ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0
ATT6 to
ATT0
Sets Attenuator Level
0 - No attenuation
127 - 127 dB attenuation
ATT0 represents 1.00 dB
Input Gain Setting Data Byte (5, 6)
B7 B6 B5 B4 B3 B2 B1 B0
0 0 0 GN4 GN3 GN2 GN1 GN0
GN4 to
GN0
Sets Input Gain
0 - No gain
31 - 46.5 dB gain
GN0 represents 1.5 dB
B7 B6 B5 B4 B3 B2 B1 B0
0 0 0 AMS ACK1 ACK0 ADF1 ADF0
ADF1 - ADF0 Sets Digital Interface Format
0 - Format 0 - I2S
1 - Format 1
2 - Format 2
3 - Format 3
ACK1 - ACK0 Sets number of bit clocks per Fs period
0 - 64
1 - 48 - gated 64Fs
2 - 32 - gated 64Fs
3 - 32 - continuous
AMS
AUX Master /Slave control bit
0 - port is master (SCLKAUX and
LRCKAUX are outputs).
1 - port is slave (SCLKAUX and
LRCKAUX are inputs).
DSP Port Mode Byte (8)
B7 B6 B5 B4 B3 B2 B1 B0
0 0 DMS DCK1 DCK0 DDF2 DDF1 DDF0
DDF2 - DDF0 Sets Digital Interface Format
0 - Format 0 - I2S
1 - Format 1
2 - Format 2
3 - Format 3
4 - One data pin in, One data pin out
mode (Format 4).
5 - Output is Format 1 on SDOUT1
and SDOUT2, input is Format 4
on SDIN1.
DCK1 - DCK0 Set number of bit clocks per Fs period
0 - 64
1 - 48 - gated 64 Fs
2 - 32 - gated 64 Fs
3 - 32 - continuous
DMS
DSP Master /Slave control bit
0 - port is master (SLCK and LRCK
are outputs).
1 - port is slave (SLCK and LRCK
are inputs).
DS86PP8
17
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