ISL62882BHRTZ-T(2011) 查看數據表（PDF） - Intersil

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ISL62882BHRTZ-T
(Rev.:2011)

Multiphase PWM Regulator for IMVP-6.5™ Mobile CPUs and GPUs

Intersil 

Q1

Vin

GATE Q2

DRIVER

ISL62882, ISL62882B

L

Vo

Cout

io

Q1

VIN

GATE Q2

DRIVER

L

VO

COUT

IO

LOAD LINE SLOPE

20Ω

MOD.

EA

COMP

VID

LOOP GAIN = CHANNEL B

CHANNEL A

ISOLATION

TRANSFORMER

CHANNEL A

CHANNEL B

NETWORK

ANALYZER EXCITATION OUTPUT

FIGURE 25. LOOP GAIN T1(s) MEASUREMENT SET-UP

LOAD LINE SLOPE

Ω

20

MOD.

EA

COMP

VID

LOOP GAIN = CHANNEL B

CHANNEL A

ISOLATION

TRANSFORMER

CHANNEL A

CHANNEL B

NETWORK

ANALYZER EXCITATION OUTPUT

FIGURE 26. LOOP GAIN T2(s) MEASUREMENT SET-UP

25

FN6890.4

June 21, 2011

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