CS61884-IB 查看數據表（PDF） - Cirrus Logic

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CS61884-IB

Octal T1/E1/J1 Line Interface Unit

Cirrus Logic 

CS61884

Table 11. Boundary Scan Register (Continued)

Notes:

1)

2)

3)

BSR

Bit

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

Pin

Name

TCLK3

LOS2

RNEG2

RPOS2

RCLK2

-

TNEG2

TPOS2

TCLK2

INT_B

RDY

-

WR_B

RD_B

ALE

CS_B

CS_B

INTL

CBLSEL

CBLSEL

TCLK5

TPOS5

TNEG5

RCLK5

RPOS5

RNEG5

-

LOS5

TCLK4

TPOS4

TNEG4

RCLK4

RPOS4

RNEG4

-

LOS4

TXOE

CLKE

Cell

Type

I

O

O

O

O

Note 2

I

I

I

O

O

Note 3

I

I

I

I

I

I

I

I

I

I

I

O

O

O

Note 2

O

I

I

I

O

O

O

Note 2

O

I

I

Bit

Symbol

TCLK3

LOS2

RNEG2

RPOS2

RCLK2

HIZ2_B

TNEG2

TPOS2

TCLK2

INT_B

RDYOUT

RDYOEN

WR_B

RD_B

ALE

CS_B

CS_B_TRI

INTL

CBLSEL_TRI

CBLSEL_IN

TCLK5

TPOS5

TNEG5

RCLK5

RPOS5

RNEG5

HIZ5_B

LOS5

TCLK4

TPOS4

TNEG4

RCLK4

RPOS4

RNEG4

HIZ4_B

LOS4

TXOE

CLKE

LPOEN controls the LOOP[7:0] pins. Setting LPOEN to “1” configures LOOP[7:0] as outputs. The output value driven

on the pins are determined by the values written to LPO[7:0]. Setting LPOEN to “0” High-Z all the pins. In this mode,

the input values driven to these LOOP[7:0] can be read via LPI[7:0].

HIZ_B controls the RPOSx, RNEGx, and RCLKx pins. When HIZ_B is High, the outputs are enabled; when HIZ_B is

Low, the outputs are placed in a high impedance state (High-Z).

RDYOEN controls the ACK_B pin. Setting RDYOEN to “1” enables output on ACK_B. Setting ACKEN to “0” High -

Z the ACK_B pin.

50

DS485F1

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