CS43L41-KZ 查看數據表（PDF） - Cirrus Logic

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CS43L41-KZ

Low Power 24-Bit, 96 kHz DAC with Volume Control

Cirrus Logic 

CS43L41

ATAPI4

1

1

1

1

1

1

1

1

1

1

1

1

1

1

ATAPI3

0

0

0

0

0

0

1

1

1

1

1

1

1

1

ATAPI2

0

0

1

1

1

1

0

0

0

0

1

1

1

1

ATAPI1

1

1

0

0

1

1

0

0

1

1

0

0

1

1

ATAPI0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

AOUTA

MUTE

MUTE

aR

aR

aR

aR

aL

aL

aL

aL

[(aL+bR)/2]

[(aL+bR)/2]

[(bL+aR)/2]

[(aL+bR)/2]

Table 9. ATAPI Decode (Continued)

AOUTB

bL

[(aL+bR)/2]

MUTE

bR

bL

[(bL+aR)/2]

MUTE

bR

bL

[(aL+bR)/2]

MUTE

bR

bL

[(aL+bR)/2]

4.10 MUTE

Channel A Volume Control Register (address 03h)

Channel B Volume Control Register (address 04h)

7

MUTE

6

VOL6

5

VOL5

4

VOL4

3

VOL3

Access:

R/W in I2C and write only in SPI.

2

VOL2

1

VOL1

0

VOL0

Default:

0 - Disabled

Function:

The Digital-to-Analog converter output will mute when enabled. The quiescent voltage on the output

will be retained. The muting function is effected, similar to attenuation changes, by the Soft and Zero

Cross bits in the Volume and Mixing Control register. The MUTEC will go active during the mute pe-

riod if the Mute function is enabled for both channels.

MUTE

0

1

Disabled

Enabled

MODE

Table 10. Mute Enable

20

DS473PP1

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