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Z86C9216VSC 查看數據表(PDF) - Zilog

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Z86C9216VSC
Zilog
Zilog 
Z86C9216VSC Datasheet PDF : 71 Pages
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Zilog
Z86C72/C92/L72/L92
IR Microcontroller
Counter/Timer
T8
P34
1
PAD
P34 OUT
P31
+
-
Pref1
P34 OUT
CTR0
D0
0 Normal Control
1 8-bit Timer output active
P37 OUT
P32 +
-
P33 (Pref2)
PCON
D0
0 = P34, P37 Standard Output *
1 = P34, P37 Comparator Output
* Reset condition.
P37
PAD
Figure 14. Port 3 Configuration
Comparator Inputs. In Analog Mode, Port 3 (P31 and
P32) have a comparator front end. The comparator refer-
ence is supplied to P33 and Pref1. In this mode, the P33
internal data latch and its corresponding IRQ1 is diverted
to the SMR Sources (excluding P31, P32, and P33) as
shown in Figure 38. In digital mode, P33 is used as D3 of
the Port 3 input register which then generates IRQ1 as
shown in Figure 15.
When P31 is used as a counter timer input (demodulation
mode), Timer input is always taken from the P31 digital in-
put buffer (whether or not analog mode is enabled).
Notes: Comparators are powered down by entering STOP
mode. For P31-P33 to be used as a Stop-Mode Recovery
source, these inputs must be placed into digital mode.
Comparator Outputs. These may be programmed to be
output on P34 and P37 through the PCON register (Figure
15).
DS97LVO0900
PRELIMINARY
6-27

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