Z8038018FSC 查看數據表（PDF） - Zilog

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Z8038018FSC

MICROPROCESSOR

Zilog 

ZILOG

16/32 BIT ROTATE AND SHIFT GROUP

MICROPROCESSOR

Mnemonic

Symbolic

Operation

Flags

P/

Opcode

# of Execute

S Z x H x V N C 76 543 210 HEX Bytes Time Notes

RLCW pp

Rotate Left Circular

¤ ¤ x 0 x P 0 ¤ 11 101 101 ED 3

2

11 001 011 CB

RLCW XY

Rotate Left Circular

00 (000) 0pp

¤ ¤ x 0 x P 0 ¤ 11 101 101 ED 3

2

11 001 011 CB

RLCW (HL) Rotate Left Circular

00 (000) 10y

¤ ¤ x 0 x P 0 ¤ 11 101 101 ED 3

2+r

11 001 011 CB

RLCW (XY+d) Rotate Left Circular

00 (000) 010

¤ ¤ x 0 x P 0 ¤ 11 y11 101

4

4+r I

11 001 011 CB

← d →

RLW m

RRCW m

RRW m

SLAW m

SRAW m

SRLW m

Rotate Left

Rotate Right Circular

Rotate Right

Shift Left Arithmetic

Shift Right Arithmetic

Shift Right Logical

¤ ¤ x 0x P0¤

¤ ¤ x 0x P0¤

¤ ¤ x 0x P0¤

¤ ¤ x 0x P0¤

¤ ¤ x 0x P0¤

0¤ x 0x P0¤

00 (000) 010

(010)

(001)

(011)

(100)

(101)

(111)

Instruction format and states are as shown for RLCW. To form new opcode replace (000) or RLCW with shown code.

pp Regs

00 BC

00 DE

11 HL

y XY

0 IX

1 IY

Notes:

Instructions in Italic face are Z380 new instructions, instructions with underline are Z180 original instructions.

I: This instruction may be used with DDIR Immediate instructions.

PS010001-0301

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