STM32F030C8P6TR(2013) 查看數據表（PDF） - STMicroelectronics
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STM32F030C8P6TR
(Rev.:2013)
(Rev.:2013)
STMicroelectronics
STM32F030C8P6TR Datasheet PDF : 88 Pages
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STM32F030x4 STM32F030x6 STM32F030x8
Electrical characteristics
6.3.2
Operating conditions at power-up / power-down
The parameters given in Table 19 are derived from tests performed under the ambient
temperature condition summarized in Table 18.
Table 19. Operating conditions at power-up / power-down
Symbol
Parameter
Conditions
Min
Max
Unit
tVDD
tVDDA
VDD rise time rate
VDD fall time rate
VDDA rise time rate
VDDA fall time rate
0
20
µs/V
0
20
6.3.3
6.3.4
Embedded reset and power control block characteristics
The parameters given in Table 20 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 18: General operating
conditions.
Table 20. Embedded reset and power control block characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
VPOR/PDR(1)
Power on/power down
reset threshold
Falling edge
Rising edge
1.8(2) 1.88 2.06 V
1.84 1.92 2.10 V
VPDRhyst(1) PDR hysteresis
tRSTTEMPO(3) Reset temporization
-
40 - mV
1.5 2.5 4.5 ms
1. The PDR detector monitors VDD and also VDDA (if kept enabled in the option bytes). The POR
detector monitors only VDD.
2. The product behavior is guaranteed by design down to the minimum VPOR/PDR value.
3. Guaranteed by design, not tested in production.
Embedded reference voltage
The parameters given in Table 21 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 18: General operating
conditions.
Table 21. Embedded internal reference voltage
Symbol
Parameter
Conditions
Min Typ Max Unit
VREFINT
TS_vrefint (2)
Internal reference voltage
ADC sampling time when
reading the internal
reference voltage
–40 °C < TA < +85 °C 1.16 1.2 1.24(1) V
- 5.1 17.1(3) µs
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