STM32F050G4U7TR 查看數據表（PDF） - STMicroelectronics
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STM32F050G4U7TR
STMicroelectronics
STM32F050G4U7TR Datasheet PDF : 97 Pages
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STM32F050xx
Electrical characteristics
Equation 1: RAIN max formula
RAIN
<
-----------------------------T----S------------------------------
fADC × CADC × ln (2N + 2)
–
RADC
The formula above (Equation 1) is used to determine the maximum external impedance
allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Table 50. RAIN max for fADC = 14 MHz(1)
Ts (cycles)
tS (µs)
1.5
0.11
7.5
0.54
13.5
0.96
28.5
2.04
41.5
2.96
55.5
3.96
71.5
5.11
239.5
17.1
1. Guaranteed by design, not tested in production.
RAIN max (kΩ)
0.4
5.9
11.4
25.2
37.2
50
NA
NA
Table 51. ADC accuracy(1)(2) (3)
Symbol
Parameter
Test conditions
ET Total unadjusted error
EO Offset error
EG Gain error
ED Differential linearity error
EL Integral linearity error
fPCLK = 48 MHz,
fADC = 14 MHz, RAIN < 10 kΩ,
VDDA = 3 V to 3.6 V
TA = 25 °C
ET Total unadjusted error
EO Offset error
EG Gain error
ED Differential linearity error
EL Integral linearity error
ET Total unadjusted error
EO Offset error
EG Gain error
ED Differential linearity error
EL Integral linearity error
fPCLK = 48 MHz,
fADC = 14 MHz, RAIN < 10 kΩ,
VDDA = 2.7 V to 3.6 V
TA = −40 to 105 °C
fPCLK = 48 MHz,
fADC = 14 MHz, RAIN < 10 kΩ,
VDDA = 2.4 V to 3.6 V
TA = 25 °C
1. ADC DC accuracy values are measured after internal calibration.
Typ
±1.3
±1
±0.5
±0.7
±0.8
±3.3
±1.9
±2.8
±0.7
±1.2
±3.3
±1.9
±2.8
±0.7
±1.2
Max(4) Unit
±2
±1.5
±1.5 LSB
±1
±1.5
±4
±2.8
±3
LSB
±1.3
±1.7
±4
±2.8
±3
LSB
±1.3
±1.7
Doc ID 023683 Rev 1
73/97
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