STM1404
Operation
Table 3. I/O status in battery backup
Pin
Status
VOUT
VCC
PFI
Connected to VBAT through internal switch
Disconnected from VOUT
Disabled
PFO
Logic low
MR
Disabled
RST
Logic low
VBAT
Vccsw
Connected to VOUT
Logic high
VREF
BLD
Pulled to VSS below 2.4 V (VSW)
Logic high
VTPU
Connected to VBAT through an internal switch
The power-fail input (PFI) is compared to an internal reference voltage (independent from
the VRST comparator). If PFI is less than the power-fail threshold (VPFI), the power-fail
output (PFO) will go low. This function is intended for use as an undervoltage detector to
signal a failing power supply. Typically PFI is connected through an external voltage divider
(see Figure 4 on page 9) to either the unregulated DC input (if it is available) or the
regulated output of the VCC regulator. The voltage divider can be set up such that the
voltage at PFI falls below VPFI several milliseconds before the regulated VCC input to the
STM1404 or the microprocessor drops below the minimum operating voltage.
During battery backup, the power-fail comparator is turned off and PFO goes (or remains)
low (see Figure 9 on page 16). This occurs after VCC drops below VSW (~2.4 V). When
power returns, the power-fail comparator is enabled and PFO follows PFI. If the comparator
is unused, PFI should be connected to VSS and PFO left unconnected. PFO may be
connected to MR so that a low voltage on PFI will generate a reset output.
3.4
Applications information
These supervisor circuits are not short-circuit protected. Shorting VOUT to ground -
excluding power-up transients such as charging a decoupling capacitor - destroys the
device. Decouple both VCC and VBAT pins to ground by placing 0.1 µF capacitors as close to
the device as possible.
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