ST7FMC2N6B6(2004) 查看數據表（PDF） - STMicroelectronics

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ST7FMC2N6B6
(Rev.:2004)

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI™

STMicroelectronics 

ST7MC1/ST7MC2

16-BIT TIMER (Cont’d)

Figure 43. Counter Timing Diagram, internal clock divided by 2

CPU CLOCK

INTERNAL RESET

TIMER CLOCK

COUNTER REGISTER

TIMER OVERFLOW FLAG (TOF)

FFFD FFFE FFFF 0000 0001 0002 0003

Figure 44. Counter Timing Diagram, internal clock divided by 4

CPU CLOCK

INTERNAL RESET

TIMER CLOCK

COUNTER REGISTER FFFC

FFFD

TIMER OVERFLOW FLAG (TOF)

0000

0001

Figure 45. Counter Timing Diagram, internal clock divided by 8

CPU CLOCK

INTERNAL RESET

TIMER CLOCK

COUNTER REGISTER

FFFC

FFFD

0000

TIMER OVERFLOW FLAG (TOF)

Note: The Device is in reset state when the internal reset signal is high, when it is low the Device is run-

ning.

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