ST7PMC2N6B6(2004) 查看數據表（PDF） - STMicroelectronics

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ST7PMC2N6B6
(Rev.:2004)

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI™

STMicroelectronics 

ST7MC1/ST7MC2

I/O PORTS (Cont’d)

Table 11. I/O Port Configurations

NOT IMPLEMENTED IN

TRUE OPEN DRAIN

I/O PORTS

PAD

VDD

RPU

Hardware Configuration

DR REGISTER ACCESS

PULL-UP

CONDITION

DR

W

REGISTER

R

DATA BUS

NOT IMPLEMENTED IN

TRUE OPEN DRAIN

I/O PORTS

PAD

VDD

RPU

INTERRUPT

CONDITION

ALTERNATE INPUT

EXTERNAL INTERRUPT

SOURCE (eix)

ANALOG INPUT

DR REGISTER ACCESS

DR

R/W

REGISTER

DATA BUS

NOT IMPLEMENTED IN

TRUE OPEN DRAIN

I/O PORTS

PAD

VDD

RPU

ALTERNATE

ENABLE

ALTERNATE

OUTPUT

DR REGISTER ACCESS

DR

R/W

REGISTER

DATA BUS

ALTERNATE

ENABLE

ALTERNATE

OUTPUT

Notes:

1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,

reading the DR register will read the alternate function output status.

2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,

the alternate function reads the pin status given by the DR register content.

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