ST7FMC2N6B6(2004) 查看數據表（PDF） - STMicroelectronics

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ST7FMC2N6B6
(Rev.:2004)

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI™

STMicroelectronics 

ST7MC1/ST7MC2

EXTERNAL INTERRUPT CONTROL REGISTER (EICR) (Cont’d)

- ei0 (port D5..3)

IS31 IS30

00

01

External Interrupt Sensitivity

IPA bit =0

Falling edge &

low level

Rising edge only

IPA bit =1

Rising edge

& high level

Falling edge only

Bit 0= IPA Interrupt polarity for port A

This bit is used to invert the sensitivity of the port A

[3:0] external interrupts. It can be set and cleared

by software only when I1 and I0 of the CC register

are both set to 1 (level 3).

0: No sensitivity inversion

1: Sensitivity inversion

1 0 Falling edge only Rising edge only

11

Rising and falling edge

- ei0 (port D2..0)

IS31 IS30

00

01

10

11

External Interrupt Sensitivity

Falling edge & low level

Rising edge only

Falling edge only

Rising and falling edge

These 2 bits can be written only when I1 and I0 of

the CC register are both set to 1 (level 3).

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