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ST7FMC2S5TC(2004) 查看數據表(PDF) - STMicroelectronics

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ST7FMC2S5TC Datasheet PDF : 294 Pages
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ST7MC1/ST7MC2
MOTOR CONTROLLER (Contd)
9.6.9.3 Dead Time Generator
When using typical triple half bridge topology for
power converters, precautions must be taken to
avoid short circuits in half bridges. This is ensured
by driving high and low side switches with comple-
mentary signals and by managing the time be-
tween the switching-off and the switching-on in-
stants of the adjacent switches.
This time is usually known as deadtime and has to
be adjusted depending on the devices connected
to the PWM outputs and their characteristics (in-
trinsic delays of level-shifters, delays due to power
switches,...).
When driving motors in six-step mode, the dead-
time generator function also allows synchronous
rectification to be performed on the switch adja-
cent to the one where PWM is applied to reduce
conduction losses.
Figure 109. Dead Time waveforms
For each of the three PWM channels, there is one
6-bit Dead Time generator available.
It generates two output signals: A and B.
The A output signal is the same as the input phase
signal except for the rising edge, which is delayed
relative to the input signal rising edge.
The B output signal is the opposite of the input
phase signal except the rising edge which is de-
layed relative to the input signal falling edge.
Figure 109 shows the relationship between the
output signals of the deadtime register and its in-
puts.
If the delay is greater than the width of the active
phase (A or B) then the corresponding pulse is not
generated (see Figure 110 and Figure 111).
Reference
5V
Input signal
0V
Output A
5V
Output B
Delay
Delay
0V
5V
0V
Figure 110. Dead time waveform with delay greater than the negative PWM pulse
Input
Output A
Output B
5V
0V
5V
Delay
0V
5V
0V
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