
PSD8XX Family
Figure 41. Input to Output Disable/Enable
INPUT
tER
INPUT TO
OUTPUT
ENABLE/DISABLE
Figure 42. Asynchronous Reset/Preset
RESET/PRESET
INPUT
REGISTER
OUTPUT
tARPW
tARP
PSD835G2
tEA
Figure 43. ISC Timing
TCK
tISCCH
TDI/TMS
ISC OUTPUTS/TDO
ISC OUTPUTS/TDO
100
t ISCCL
t ISCPSU tISCPH
t ISCPZV
t ISCPCO
tISCPVZ