PSD4135F-C-70UI 查看數據表（PDF） - STMicroelectronics
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PSD4135F-C-70UI Datasheet PDF : 110 Pages
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PSD835G2
Microcontroller Interface – PSD835G2 AC/DC Parameters
(5V ± 10% Versions)
PSD8XX Family
Flash Program, Write and Erase Times (5 V ± 10%)
Symbol
Parameter
Min Typ Max Unit
t WHQV3
t WHQV2
t WHQV1
t WHWLO
t Q7VQV
Flash Program
Flash Bulk Erase (Preprogrammed to 00) (Note 1)
Flash Bulk Erase
Sector Erase (Preprogrammed to 00)
Sector Erase
Word Program
Program/Erase Cycles (Per Sector)
Sector Erase Time-Out
DQ7 Valid to Output Valid
(Data Polling) (Note 2)
8.5
3
10
1
2.2
14
100,000
100
NOTE: 1. Programmed to all zeros before erase.
2. The polling status DQ7 is valid tQ7VQV ns before the data DQ0-7 is valid for reading.
30
30
1200
sec
sec
sec
sec
sec
µs
cycles
µs
30
ns
ISC Timing (5 V ± 10%)
-70
-90
Symbol
Parameter
t ISCCF
t ISCCH
t ISCCL
t ISCCF-P
t ISCCH-P
t ISCCL-P
t ISCPSU
t ISCPH
t ISCPCO
t ISCPZV
t ISCPVZ
TCK Clock Frequency (except for PLD)
TCK Clock High Time
TCK Clock Low Time
TCK Clock Frequency (for PLD only)
TCK Clock High Time(for PLD only)
TCK Clock Low Time(for PLD only)
ISC Port Set Up Time
ISC Port Hold Up Time
ISC Port Clock to Output
ISC Port High-Impedance to Valid Output
ISC Port Valid Output to
High-Impedance
NOTES: 1. For “non-PLD” programming, erase or in ISC by-pass mode.
2. For program or erase PLD only.
Conditions
(Note 1)
(Note 1)
(Note 1)
(Note 2)
(Note 2)
(Note 2)
Min Max Min Max Unit
20
18 MHz
23
26
ns
23
26
ns
2
2 MHz
240
240
ns
240
240
ns
6
8
ns
5
5
ns
21
23 ns
21
23 ns
21
23 ns
85
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