PSD512B1-C-90UI 查看數據表（PDF） - STMicroelectronics
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PSD512B1-C-90UI Datasheet PDF : 153 Pages
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The PSD5XX
Architecture
(cont.)
PSD5XX Family
Table 3. ZPLD Input Signals
Signal Name
From
PA0 – PA7
PB0 – PB7
PE0 – PE7
PC0 – PC7
PD0 - PD7
PGR0 – PGR3
WDOG2PLD
INTR2PLD
A8 – A15, A0, A1
RD/E/DS
WR/R_W
CLKIN
RESET
CSI
Port A inputs or Macrocell PA feedback
Port B inputs or Macrocell PB feedback
Port E inputs or Macrocell PE feedback
Port C inputs
Port D inputs
Page Mode Register
Counter/Timer
Interrupt Controller
MCU Address Lines
MCU bus signal
MCU bus signal
Input Clock
Reset input
CSI input (ORed with power down from PMU)
13
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