
PIC16F753/HV753
FIGURE 19-5:
TIME-OUT SEQUENCE ON POWER-UP (DELAYED MCLR): CASE 2
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
TPWRT
TIOSCST
FIGURE 19-6:
TIME-OUT SEQUENCE ON POWER-UP (MCLR WITH VDD)
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
TPWRT
TIOSCST
2013 Microchip Technology Inc.
Preliminary
DS40001709A-page 167