PCA9518A 查看數據表（PDF） - NXP Semiconductors.

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PCA9518A

Expandable 5-channel I2C-bus hub

NXP Semiconductors. 

NXP Semiconductors

PCA9518A

Expandable 5-channel I2C-bus hub

10. Dynamic characteristics

Table 6. Dynamic characteristics

VDD = 3.0 V to 3.6 V[1]; VSS = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified.

Symbol Parameter

Conditions

Min

tPHL

HIGH to LOW propagation delay

SDA to SDAn, or

SCL to SCLn; Figure 7

[2][3] 105

tPLH

LOW to HIGH propagation delay

SDA to SDAn, or

SCL to SCLn; Figure 7

[2][4] 110

tPHL1

HIGH to LOW propagation delay 1 EXPSDA1 to SDA, or

109

EXPSCL1 to SCL; Figure 7

tPLH1

LOW to HIGH propagation delay 1 EXPSDA1 to SDA, or

130

EXPSCL1 to SCL; Figure 7

tPLH2

LOW to HIGH propagation delay 2 EXPSDA2 to SDA, or

160

EXPSCL2 to SCL; Figure 7

tTHL

HIGH to LOW output transition time SDA, SCL; Figure 7

58

tTLH

LOW to HIGH output transition time SDA, SCL; Figure 7

-

tsu

set-up time

enable to START condition

300

th

hold time

enable after STOP condition

300

Typ

Max Unit

202

389 ns

259

265 ns

193

327 ns

153

179 ns

234

279 ns

110

187 ns

0.85 RC -

ns

-

-

ns

-

-

ns

[1] For operation between published voltage ranges, refer to worst-case parameter in both ranges.

[2] The SDA and SCL propagation delays are dominated by rise times or fall times. The fall times are mostly internally controlled and are

only sensitive to load capacitance. The rise times are RC time constant controlled and therefor a specific numerical value can only be

given for fixed RC time constants.

[3] The SDA HIGH to LOW propagation delay includes the fall time from VDD to 0.5VDD of the EXPSDA1 or EXPSCL1 pins and the SDA or

SCL fall time from the quiescent HIGH (usually VDD) to below 0.3VDD. The SDA and SCL outputs have edge rate control circuits

included which make the fall time almost independent of load capacitance.

[4] The SDA or SCL LOW to HIGH propagation delay includes the rise time constant from the quiescent LOW to 0.5VDD for the EXPSDA1

or EXPSCL2, the rise time constant for the quiescent LOW to 0.5VDD for the EXPSDA1 or EXPSCL1, and the rise time constant from

the quiescent external driven LOW to 0.7VDD for the SDA or SCL output. All of these rise times are RC time constants determined by the

external resistance and total capacitance for the various nodes.

PCA9518A_3

Product data sheet

Rev. 03 — 3 December 2008

© NXP B.V. 2008. All rights reserved.

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