PCA8538UG(2014) 查看數據表（PDF） - NXP Semiconductors.

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产品描述 (功能)

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PCA8538UG
(Rev.:2014)

Automotive 102 x 9 Chip-On-Glass LCD segment driver

NXP Semiconductors. 

NXP Semiconductors

PCA8538

Automotive 102 x 9 Chip-On-Glass LCD segment driver

Table 24. Clock and frame frequency values …continued

Duty cycle definition: % HIGH-level time : % LOW-level time.

FF[4:0] Frame frequency (Hz) Clock frequency (Hz)

01011 100

14400

01100 110

15781

01101 120

17194

01110 130

18581

01111 140

20211

10000 150

21736

10001 160

23040

10010 170

24511

10011 180

26182

10100 190

27429

10101 200

28800

10110 210

30316

10111 220

32000

11000 230

32914

11001 240

34909

11010 250

36000

11011 260

37161

11100 270

38400

11101 280

39724

11110 290

41143

11111 300

42667

[1] Default value.

Typical duty cycle (%)[1]

20 : 80

13 : 87

5 : 95

49 : 51

44 : 56

40 : 60

36 : 64

32 : 68

28 : 72

24 : 76

20 : 80

16 : 84

12 : 88

9 : 91

4 : 96

50 : 50

49 : 51

47 : 53

45 : 55

43 : 57

41 : 59

8.7 Display RAM commands

8.7.1 Command: Write-display-data

The Write-display-data command writes data byte-wise to the RAM. After Power-On

Reset (POR) the RAM content is random and should be brought to a defined status by

clearing it (setting it logic 0).

Table 25. Write-display-data - write display data command bit description

For this command, the register selection bits have to be set RS[1:0] = 01.

Bit

Symbol

Value

Description

-

R/W

0

fixed value

-

RS[1:0]

01

fixed value

7 to 0 DB[7:0]

00000000 to writing data byte-wise to RAM

11111111

More information about the display RAM can be found in Section 8.14 on page 55.

PCA8538

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 26 September 2014

© NXP Semiconductors N.V. 2014. All rights reserved.

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