M50FLW040ANB5TP 查看數據表（PDF） - STMicroelectronics

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M50FLW040ANB5TP

4-Mbit (5 × 64 Kbyte blocks + 3 × 16 × 4 Kbyte sectors) 3-V supply Firmware Hub / low-pin count Flash memory

STMicroelectronics 

Flowcharts and pseudo codes

M50FLW040A, M50FLW040B

Figure 25. Chip Erase flowchart and pseudo code (A/A Mux interface only)

Start

Write 80h

Write 10h

Read Status

Register

Chip Erase command:

– write 80h

– write 10h

(memory enters read Status Register after

the Chip Erase command)

do:

– read Status Register

NO

SR7 = 1

while SR7 = 0

YES

NO

SR3 = 0

VPP Invalid

Error (1)

If SR3 = 1, VPP invalid error:

– error handler

YES

NO

SR4, SR5 = 0

Command

Sequence Error (1)

If SR4, SR5 = 1, Command sequence error:

– error handler

YES

NO

SR5 = 0

Erase Error (1)

If SR5 = 1, Erase error:

– error handler

YES

End

AI08428B

1. If an error is found, the Status Register must be cleared before further Program/Erase Controller

operations.

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