SST29EE512-70-4C-PH(2005) 查看數據表（PDF） - Silicon Storage Technology

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SST29EE512-70-4C-PH
(Rev.:2005)

512 Kbit (64K x8) Page-Write EEPROM

Silicon Storage Technology 

Data Sheet

Pin # 1 Identifier

512 Kbit Page-Write EEPROM

SST29EE512

1.05

0.95

0.50

BSC

8.10

0.27

7.90

0.17

18.50

18.30

0.70

0.50

20.20

19.80

1.20

max.

Note:

1.Complies with JEDEC publication 95 MO-142 BD dimensions,

although some dimensions may be more stringent.

2.All linear dimensions are in millimeters (max/min).

3.Coplanarity: 0.1 mm

4.Maximum allowable mold flash is 0.15 mm at the package ends, and 0.25mm between leads.

32-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) 8MM X 20MM

SST PACKAGE CODE: EH

0.15

0.05

DETAIL

0˚- 5˚

0.70

0.50

1mm

32-tsop-EH-7

©2005 Silicon Storage Technology, Inc.

24

S71060-09-000

9/05

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