M25PE10-VMN6TP 查看數據表（PDF） - STMicroelectronics

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M25PE10-VMN6TP

1 and 2 Mbit, low voltage, Page-Erasable Serial Flash memories with Byte-Alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

M25PE20, M25PE10

Figure 6. M25PE20 block diagram

Reset

TSL or W

S

C

D

Q

Control Logic

High Voltage

Generator

I/O Shift Register

Memory organization

Address Register

and Counter

3FF00h

2FFFFh

256 Byte

Data Buffer

Status

Register

3FFFFh Top 256 Pages can

be made read-only

by using the TSL pin(1)

The whole memory array

can be made read-only

on a 64 Kbyte basis

through the Lock

Registers

00000h

000FFh

256 Bytes (Page Size)

X Decoder

1. These features (in gray) are only available in the T7X process.

AI3294b

19/60

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