LTC1605-1I 查看數據表（PDF） - Linear Technology
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LTC1605-1I Datasheet PDF : 20 Pages
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LTC1605-1/LTC1605-2
TYPICAL APPLICATIO S
The circuit in Figure 16 is an example showing the LTC1605
16-bit A/D converter and LTC1391 8-channel MUX con-
nected to a 68HC11 controller. The LTC1605’s 16-bit data
output is read in two 8-bit bytes using Pins 6 (MSB, Bit7)
through 13 (Bit8, Bit0), connected to the HC11’s PORTC.
The MUX’s 4-bit serial address data is sent using the
controller’s SPI.
The process to convert a channel’s input signal is shown
in sample listing A. It begins with shifting in the MUX’s
channel data while the SS signal is a logic high. The MUX
channel address is latched on the falling edge of SS and the
chosen channel’s input is applied at the LTC1605’s input,
Pin 1. Through the processor’s PORTA, a low-going pulse
is applied to the LTC1605’s R/C pin, initiating a conver-
sion. The processor then monitors the BUSY output.
When this signal becomes a logic high, signaling the end
of conversion, the processor reads the high byte of the
conversion through PORTC. The low byte is read through
PORTC when the processor changes the BYTE signal to a
logic high. The timing relationship of the control signals
and data are shown in Figure 17.
Sample Listing A
*************************************************************************
*
*
* This example program selects the an LTC1391 MUX channel, initiates a *
* conversion, and retrieves conversion data. It stores the 16-bit data *
* in two consecutive memory locations. The program is designed for use *
* with the LTC1605’s /CS tied to ground (see timing diagram in
*
* Figure 17).
*
*
*
*************************************************************************
*
*****************************************
* 68HC11 register definitions
*
*****************************************
*
PORTA EQU $1000 Parallel port A
*
Use Bit0 as an input for the LTC1605’s /BUSY signal
*
Use Bit3 as an output driving the LTC1605’s BYTE
*
input
PIOC EQU $1002 Parallel I/O control register
*
“STAF,STAI,CWOM,HNDS, OIN, PLS, EGA,INVB”
PORTC EQU $1003 Port C data register
*
“Bit7,Bit6,Bit5,Bit4,Bit3,Bit2,Bit1,Bit0”
DDRC EQU $1007 Port D data direction register
*
“Bit7,Bit6,Bit5,Bit4,Bit3,Bit2,Bit1,Bit0”
*
1 = output, 0 = input
PORTD EQU $1008 Port D data register
*
“ - , - , SS* ,CSK ;MOSI,MISO,TxD ,RxD “
DDRD EQU $1009 Port D data direction register
SPCR EQU $1028 SPI control register
*
“SPIE,SPE ,DWOM,MSTR;SPOL,CPHA,SPR1,SPR0”
SPSR EQU $1029 SPI status register
*
“SPIF,WCOL, - ,MODF; - , - , - , - “
SPDR EQU $102A SPI data register; Read-Buffer; Write-Shifter
*
* RAM variables to hold the LTC1605’s 14 conversion result
*
DIN1 EQU $00 This memory location holds the LTC1605’s bits 15 - 08
DIN2 EQU $01 This memory location holds the LTC1605’s bits 07 - 00
MUX EQU $02 This memory location holds the MUX address data
*
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