PDM31098SA8SO 查看數據表（PDF） - Paradigm Technology
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PDM31098SA8SO Datasheet PDF : 8 Pages
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PRELIMINARY
PDM31098
Read Cycle No. 2(2, 4, 6)
ADDR
CE1
OE
DOUT
tRC
tAA
tACE
tLZCE
tLZOE
tAOE
tHZCE
tHZOE
DATA VALID
AC Electrical Characteristics
Description
-8*
-10*
–12
–15
–20
READ Cycle
Sym Min Max Min Max Min Max Min Max Min Max Units
READ cycle time
Address access time
Chip enable access time
Output hold from address change
Chip enable to output in low Z(1,3)
Chip disable to output in high Z(1,2,3)
tRC
8 — 10 — 12 — 15 — 20 — ns
tAA
— 8 — 10 — 12 — 15 — 20 ns
tACE — 8 — 10 — 12 — 15 — 20 ns
tOH
3 — 3 — 3 — 3 — 3 — ns
tLZCE 3 — 3 — 3 — 3 — 3 — ns
tHZCE
—
4
—
5—6—7—7
ns
Output enable access time
tAOE — 4 — 5 — 6 — 7 — 8 ns
Output Enable to output in low Z (1,3)
tLZOE
0 — 0 — 0 — 0 — 0 — ns
Output disable to output in high Z(1,3) tHZOE —
4
—
4—5—6—7
ns
SHADED AREA = PRELIMINARY DATA
* VCC = 3.3V + 5%
1
2
3
4
5
6
7
8
9
10
11
12
Rev. 1.3 - 5/27/98
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