
dsPIC30F3014/4013
FIGURE 18-1:
DCI MODULE BLOCK DIAGRAM
FOSC/4
Word Size Selection bits
Frame Length Selection bits
DCI Mode Selection bits
Receive Buffer
Registers w/Shadow
Transmit Buffer
Registers w/Shadow
BCG Control bits
Sample Rate
Generator
Frame
Synchronization
Generator
SCKD
FSD
DCI Buffer
Control Unit
15
0
DCI Shift Register
CSCK
COFS
CSDI
CSDO
DS70138E-page 116
© 2007 Microchip Technology Inc.