CS8422 查看數據表（PDF） - Cirrus Logic
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CS8422 Datasheet PDF : 82 Pages
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SWITCHING SPECIFICATIONS
Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF.
Parameter
Symbol Min
RST pin Low Pulse Width (Note 7)
1
PLL Clock Recovery Sample Rate Range (Note 8)
28
RMCK Output Jitter (Note 9)
Differential RX Mode
-
Single-Ended RX Mode
-
XTI Frequency
Crystal
12
Digital Clock Source
1.024
XTI Pulse Width High/Low
9
VL = 3.3 V, 5 V
RMCK/MCLK_OUT Output Frequency
-
RMCK/MCLK_OUT Output Duty Cycle
45
Slave Mode
ISCLK Frequency
-
ISCLK High Time
ISCLK Low Time
OSCLK Frequency
tsckh
9.2
tsckl
9.2
-
OSCLK High Time
OSCLK Low Time
I/OLRCK Edge to I/OSCLK Rising Edge
I/OSCLK Rising Edge to I/OLRCK Edge
OSCLK Falling Edge/OLRCK Edge to SDOUT Output Valid
SDIN/TDM_IN Setup Time Before I/OSCLK Rising Edge
SDIN/TDM_IN Hold Time After I/OSCLK Rising Edge
TDM Mode OLRCK High Time (Note 10)
TDM Mode OLRCK Rising Edge to OSCLK Rising Edge
TDM Mode OSCLK Rising Edge to OLRCK Falling Edge
Master Mode (Note 11)
I/OSCLK Frequency (non-TDM Mode)
I/OLRCK Duty Cycle
I/OSCLK Duty Cycle
I/OSCLK Falling Edge to I/OLRCK Edge
OSCLK Falling Edge to SDOUT Output Valid
SDIN Setup Time Before I/OSCLK Rising Edge
SDIN Hold Time After I/OSCLK Rising Edge
TDM Mode OSCLK Frequency (Note 12)
tsckh
tsckl
tlcks
tlckd
tdpd
tds
tdh
tlrckh
tfss
tfsh
16.7
16.7
5.7
4.2
-
3.6
5.5
20
5.3
4.2
48*Fsi/o
49.5
45
tlcks
-
tdpd
-
tds
2.7
tdh
5.5
-
CS8422
Typ
Max Units
-
-
ms
-
216
kHz
200
-
ps RMS
475
-
ps RMS
-
27.000 MHz
-
49.152 MHz
-
-
ns
-
49.152 MHz
50
55
%
-
49.152 MHz
-
-
ns
-
-
ns
-
26.9
MHz
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
15
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
128*Fsi/o MHz
-
50.5
%
-
55
%
-
4.2
ns
-
4.6
ns
-
-
ns
-
-
ns
-
49.152 MHz
DS692F1
17
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