CS8420-CSR 查看數據表（PDF） - Cirrus Logic

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CS8420-CSR

Digital Audio Sample Rate Converter

Cirrus Logic 

13.6.1 Pin Description - Hardware Mode 5

CS8420

Overall Device Control:

DFC0, DFC1 - Data Flow Control Inputs

DFC0 and DFC1 inputs determine the major data flow options available in Hardware mode, according to Table 5.

S/AES - Serial Audio or AES3 Input Select

S/AES is connected to DGND in Hardware mode 5, in order to select the AES3 input.

OMCK - Output Section Master Clock Input

Output section master clock input. This pin is not used in this mode and should be connected to DGND.

Audio Output Interface:

SDOUT - Serial Audio Output Port Data Output

Audio data serial output pin. This is also a start-up option pin, and requires a pull-up or pull-down resistor.

OSCLK - Serial Audio Output Port Bit Clock Input or Output

Serial bit clock for audio data on the SDOUT pin.

OLRCK - Serial Audio Output Port Left/Right Clock Input or Output

Word rate clock for the audio data on the SDOUT pin. The frequency will be at the input sample rate (Fsi).

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DS245F4

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