CS8415A-CS 查看數據表（PDF） - Cirrus Logic
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CS8415A-CS Datasheet PDF : 46 Pages
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CS8415A
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C MODE
(Note 15), Inputs: Logic 0 = 0 V, Logic 1 = VL+; CL = 20 pF.
Parameter
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time to SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Symbol Min
fscl
-
tbuf
4.7
thdst
4.0
tlow
4.7
thigh
4.0
tsust
4.7
(Note 16) thdd
0
tsud
250
tr
-
tf
-
tsusp
4.7
Typ Max
-
100
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
25
-
25
-
-
Units
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
15. I²C protocol is supported only in VL+ = 5.0 V mode.
16. Data must be held for sufficient time to bridge the 25 ns transition time of SCL.
Stop Start
Repeated
Start
SDA
SCL
t buf
t hdst
t high
t hdst
tf
t
low
t hdd
t sud
t sust
tr
Figure 4. I²C Mode Timing
Stop
t susp
10
DS470F4
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