CS8952-IQZ 查看數據表（PDF） - Cirrus Logic
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CS8952-IQZ Datasheet PDF : 81 Pages
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CS8952
6. CS8952 REGISTERS
The CS8952 register set is comprised of the 16-bit
status and control registers described below. A de-
tailed description each register follows.
Register Address
0h
1h
2h
3h
4h
5h
6h
7h
8h through Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh through 1Fh
Description
Basic Mode Control Register
Basic Mode Status Register
PHY Identifier #1
PHY Identifier #2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page Transmit Register
Reserved by IEEE 802.3 Working Group
Interrupt Mask Register
Interrupt Status Register
Disconnect Count Register
False Carrier Count Register
Scrambler Key Initialization Register
Receive Error Count Register
Descrambler Key Initialization Register
PCS Sub-Layer Configuration Register
Loopback, Bypass and Receiver Error Mask Register
Self-Status Register
Reserved
10BASE-T Status Register
10BASE-T Configuration Register
Reserved
Type
Read/Write
Read-Only
Read-Only
Read-Only
Read/Write
Read-Only
Read-Only
Read/Write
-
Read/Write
Read-Only
Read-Only
Read-Only
Read/Write
Read-Only
Read/Write
Read/Write
Read/Write
Read/Write
-
Read-Only
Read/Write
-
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
30
DS206F1
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