datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

CS8411-IS 查看數據表(PDF) - Cirrus Logic

零件编号
产品描述 (功能)
生产厂家
CS8411-IS
Cirrus-Logic
Cirrus Logic 
CS8411-IS Datasheet PDF : 38 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
CS8411 CS8412
PIN DESCRIPTIONS: CS8411
CS8411
DATA BUS BIT 2
DATA BUS BIT 3
DATA BUS BIT 4
DATA BUS BIT 5
DATA BUS BIT 6
DATA BUS BIT 7
DIGITAL POWER
DIGITAL GROUND
RECEIVE POSITIVE
RECEIVE NEGATIVE
FRAME SYNC
SERIAL DATA CLOCK
ADD BUS BIT 4 / FCLOCK
INTERRUPT
D2 1
D3 2
D4 3
D5 4
D6 5
D7 6
VD+ 7
DGND 8
RXP 9
RXN 10
FSYNC 11
SCK 12
A4/FCK 13
INT 14
28 D1
27 D0
26 SDATA
25 ERF
24 CS
23 RD/WR
22 VA+
21 AGND
20 FILT
19 MCK
18 A0
17 A1
16 A2
15 A3
DATA BUS BIT 1
DATA BUS BIT 0
SERIAL OUTPUT DATA
ERROR FLAG
CHIP SELECT
READ/WRITE SELECT
ANALOG POWER
ANALOG GROUND
FILTER
MASTER CLOCK
ADDRESS BUS BIT 0
ADDRESS BUS BIT 1
ADDRESS BUS BIT 2
ADDRESS BUS BIT 3
Power Supply Connections
VD+ - Positive Digital Power, PIN 7.
Positive supply for the digital section. Nominally +5 volts.
VA+ - Positive Analog Power, PIN 22.
Positive supply for the analog section. Nominally +5 volts. This supply should be as quiet as
possible since noise on this pin will directly affect the jitter performance of the recovered
clock.
DGND - Digital Ground, PIN 8.
Ground for the digital section. DGND should be connected to same ground as AGND.
AGND - Analog Ground, PIN 21.
Ground for the analog section. AGND should be connected to same ground as DGND.
Audio Output Interface
SCK - Serial Clock, PIN 12.
Serial clock for SDATA pin which can be configured (via control register 2) as an input or
output, and can sample data on the rising or falling edge. As an input, SCK must contain 32
clocks for every audio sample in all normal audio serial port formats.
20
DS61F1

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]